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QA Engineer | L2/L3 Protocols, Networking , Python , Testing, Manual Testing | 8-12 years
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ASIC Engineer G08 | Physical implementation | Floor planning | Clock and Power distribution | Exp 4-8 Years | 2008252
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ASIC Engineering Digital Designer/ Leader ( digital design, FSM, CPU sub-systems, complex SOCs, FPGA validation | 8-12 Years | Pune)
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Data Engineer
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ASIC Design Engineer | Exp 8+ Years
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FPGA Design Technical Leader- Ethernet,PCIe, System Verilog, Xilinx- 12+ Years
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Software Engineer, Silicon One Software- Customer Experience - SDK - L2/L3
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Design Verification Engineer - UVM, Verilog (5 to 8 yrs)
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ASIC Engineering Technical Lead
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Software Engineer – C++ | Objective-C | VoIP & Collaboration Platforms | macOS/iOS | Mobile & Desktop Applications (G8) (4 - 7 Years))
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Senior Electrical Product Engineer
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Senior Technical Lead – Full Stack (Java, React/Angular, Cloud) | 12+ Years Experience*
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Software Engineer, Silicon One Software
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Software Engineering Technical Leader
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English Teachers for School Hiring open at Canning
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