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ASIC Engineering Digital Designer/ Leader ( digital design, FSM, CPU sub-systems, complex SOCs, FPGA validation | 8-12 Years | Pune)
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ASIC Engineer
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Director, Hardware Engineering | Photonics IC, SERDES, EIC, PIC, High Speed Wireline | 15+ years, Bangalore
No description available...
ASIC Engineering Digital Design Leader ( digital design, FSM, CPU sub-systems, complex SOCs, FPGA validation | 12-16 Years | Pune)
No description available...
Software Engineer | L2/L3 protocols, Optical networking | 8-12 Years
No description available...
Platform Test Engineer - L2/L3 Protocols| Routing| Python Automation (8-12 yrs)
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Technical Leader - C/C++, Device Driver, Kernel, Multithreading, Embedded Systems - 10 to 13 years - Bangalore
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Electrical Engineer
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Senior Embedded SE | C, Device Driver, Linux ,Multithreading - 7 to 10 years - Bangalore
No description available...
ASIC Engineering Analog Design Leader | high-speed optical transceiver circuits (modulator drivers, TIAs, CDRs, PLLs, ADC/DAC) | 12+ years, Bangalore
No description available...
ASIC Engineering Design Verification Leader (SystemVerilog, Python, C and UVM |8-12 years| Pune)
No description available...
Software Engineering Technical Leader | C, C++, BSP, SONiC, Device Driver, Linux, Kernel | 12 + years
No description available...
ASIC Engineering Analog Design Leader:ASIC Engineering Analog Design Leader | high-speed optical transceiver circuits (modulator drivers, TIAs, CDRs, PLLs, ADC/DAC) | 10+ years
No description available...
Engineering Team Lead (C++ Development)
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Senior Autonomy Engineer - C++
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Automation Engineer - C++
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Network Engineer - NIA (BLR)
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Network Engineer - T&D
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Accounts payable Processor
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Algorithm Developer
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Network Infrastructure Deployment Manager, AWS Global Connectivity Infrastructure Development
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Staff Systems Engineer – LiDAR Sensors
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STAFF SIGNAL INTEGRITY DVL ENGINEER
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