Semiconductor Layout Engineer

SRAM Layout Engineer

Experience:- 5-15 years

Qualifications:- B.Tech/B.E/M.Tech/M.E

Location:-Bangalore

Role and Responsibilities:-

Experienced SRAM layout profiles who can work and design SRAM leafcells, Compiler level LVS/DRC independently.

Skill Requirements:- SRAM layout compiler development.

Good to have:- Totem, EM IR fixing experience.

Interested candidates can share resume to [email protected]